Add your own simulation

Step 1: Define your design

Define your design by following the steps in section Add your own design

Step 2: Simulation folder

Create a folder named after your simulation in the odatix_userconfig/simulations folder.

Step 3: Makefile

  • Add a Makefile file to your newly created folder.

  • Add a rule named sim than runs the simulation. Any simulator installed on your system can be used.

Tip

Check out the examples for Verilator and GHDL Makefiles in the odatix_userconfig/simulations from the quick start guide.

Step 4: Optional setting file

  • Add a _settings.yml file to your newly created folder and fill it with one of the templates below

_setting.yml
1---
2# delimiters for parameter files
3use_parameters: "true"
4param_target_file: "tb/tb_counter.vhdl"
5start_delimiter: "generic ("
6stop_delimiter: ");"
7...

  • If you want the tool to edit the parameters for each configuration in a different file than the one specified in your architecture’s _settings.yml (like a testbench for example) set use_parameters to true and edit the other keys. Otherwise, set it to false.

  • Edit the param_target_file, so it matches your design/simulation top top-level.

  • Set start_delimiter and stop_delimiter, so it matches the delimiters of the parameter section in param_target_file.

  • A documentation of the keys for _settings.yml files can be found in section Settings

Note

If your testbench does not need to have its parameters modified for each configuration (as could a c++ verilator testbench for example), a _settings.yml is not mandatory

Step 5: Run your design configurations!

Follow the same steps as in section Simulations from the quick start guide:

  • Edit odatix_userconfig/simulations_settings.yml to add your simulations, linked to the corresponding design configurations

  • Run the selected simulations